Exemplary embodiments relate to a semiconductor memory device and more particularly to securing sufficient margin between threshold voltage distributions in a semiconductor memory device.
Data storage capacity of a memory device can be increased by configuring each memory cell to store more than one bit. There then could be four or more distributions of memory cell threshold voltages. There may be three or more distributions of threshold voltages of the memory cells in a program state as well as the distribution of threshold voltages of memory cells in an erase state. These distributions must be secured with a sufficient margin between them in order to determine without error as to which distribution of what state belongs the certain threshold voltages of the memory cells.
As a method of securing a sufficient margin between these distributions, there is a method of enlarging the range in which the threshold voltages of memory cells are limited therein. The global lines in a memory device are provided with many operating voltages. The operating voltages are then transferred from the global lines to the memory cells via pass transistors in a block switch. A block switch couples the global lines and the local lines connected to the memory cells for signal transfers between them. If the range in which the threshold voltage of the memory cell is limited were to be enlarged, then the operating voltages of the memory cells must be raised. Then, the breakdown voltages of the pass transistors in the block switch for transferring the operating voltages to the memory cells must be raised.
Further, the operating voltages provided to the pass transistors are lowered by the threshold voltages of the pass transistors by the time the operating voltages are actually provided to the memory cells. For this reason, the voltage actually provided to the pass transistor for memory cell operating voltage must be higher than the voltage level of the operating voltage required by the memory cell. However, raising the breakdown voltage of a pass transistor is difficult to do and prone to many side effects, such as, the disturbance generated by using a high operating voltage. Therefore, there is a need to secure the margin between the distributions without raising the operating voltage of a memory cell.